Login Register Cart 0
Generic placeholder image

Nanoscience & Nanotechnology-Asia

Editor-in-Chief

ISSN (Print): 2210-6812
ISSN (Online): 2210-6820

Back
Journal Home About Journal Editorial Board Journal Insight Current Issue Volumes/Issues
Subscribe
Research Article

An Analytical Drain Current Model for Dual-material Gate Graded - channel and Dual-oxide Thickness Cylindrical Gate (DMG-GC-DOT) MOSFET

Author(s): Hind Jaafar*, Abdellah Aouaj, Ahmed Bouziane and Benjamin Iñiguez

Volume 9, Issue 2, 2019

Page: [291 - 297] Pages: 7

DOI: 10.2174/2210681208666180813122145

Price: $65

Abstract

Background: A novel Dual Material Gate Graded Channel and Dual Oxide Thickness Cylindrical Gate (DMG-GC-DOT) MOSFET is presented in this paper.

Methods: Analytical model of drain current is developed using a quasi-two-dimensional cylindrical form of the Poisson equation and is expressed as a function of the surface potential, which is calculated using the expressions of the current density.

Results: Comparison of the analytical results with 3D numerical simulations using Silvaco Atlas - TCAD software presents a good agreement from subthreshold to strong inversion regime and for different bias voltages.

Conclusion: Two oxide thicknesses with different permittivity can effectively improve the subthreshold current of DMG-GC-DOT MOSFET.

Keywords: Dual metal gate, Dual Oxide Thickness (DOT), graded channel, subthreshold current, MOSFET, Metal-Oxide- Semiconductor (MOS).

Graphical Abstract

[1]
Dhanaselvam, P.S.; Balamurugan, N.B. Analytical approach of a nanoscale Triple Material Surrounding Gate (TMSG) MOSFETs for reduced short-channel effects. Microelectronics J., 2013, 44, 400-404.
[2]
Roy, K.; Mahmoodi, H.; Mukhopadhyay, S.; Ananthan, H.; Bansal, H.; Cakici, T. Doublegate SOI devices for low-power and highperformance applications. 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), Hyderabad, India, 2006.,
[3]
Crupi, F.; Kaczer, B.; Degraeve, R.; Subramanian, V.; Srinivasan, P.; Simoen, E.; Dixit, A.; Jurczak, M.; Groeseneken, G. Reliability Comparison of Triple-Gate versus Planar SOI FETs. IEEE Trans. Electron Dev., 2006, 53, 2351-2357.
[4]
Aouaj, A.; Bouziane, A.; Nouacry, A. Analytical 2D modeling for potential distribution and the threshold voltage of the short channel fully depleted cylindrical/surrounding gate MOSFET. Int. J. Electron., 2005, 92, 437-443.
[5]
Kranti, A.; Haldar, S.; Gupta, R.S. An accurate 2D analytical model for short channel thin film fully depleted cylindrical/surrounding gate (CGT/SGT) MOSFET. Microelectronics J., 2001, 32, 305-313.
[6]
Jaafar, H.; Aouaj, A.; Bouziane, A. Analytical Model of The Threshold Voltage Vth, Subthreshold Swing and Drain Induced Barrier Lowering (DIBL) For a new Device Structure of Cylindrical Gate MOSFET. J. Theor. Appl. Info. Technol., 2017, 95, 1355-1362.
[7]
Kaur, H.; Kabra, S.; Bindra, S. Impact of Graded Channel (GC) design in fully depleted cylindrical/surrounding gate MOSFET (FD CGT/SGT) for improved short channel immunity and hot carrier reliability. Solid-State Electron., 2007, 51, 398-404.
[8]
Li, Cong. Z.; Yi-Qi, Z.Li; Gang, J. Quasi two- dimensional threshold voltage model for junctionless cylindrical surrounding gate metaloxide- semiconductor field-effect transistor with dual-material gate. Chin. Phys. B, 2014, 23018501
[9]
Wu, M.; Jin, X.; Kwon, I.H.; Chuai, R.; Liu, X.; Lee, J.H. The optimal design of junctionless transistors with double-gate structure for reducing the effect of band-to-band tunneling. J. Semicond. Technol. Sci., 2013, 13, 245-251.
[10]
Pal, A.; Sarkar, A. Analytical study of dual material surrounding gate MOSFET to suppress Short-Channel Effects (SCEs). Eng. Sci. Technol., 2014, 17, 205-212.
[11]
Pujarini, G.; Haldar, S.; Gupta, R.S.; Mridula, G. An analytical drain current model for dual material engineered cylindrical/surrounding gate MOSFET. Microelectronics J., 2012, 43, 17-24.
[12]
Li, C.; Zhuang, Y.; Han, R.; Jin, G. Subthreshold behavior models for short channel juntionless tri-material cylindrical surrounding-gate MOSFET. Microelectronics J., 2014, 54, 1274-1281.
[13]
Hamdy, A.; Benjamin, I.; Jaume, R. Analytical model of the threshold voltage and subthreshold swing of undoped cylindrical gate-all-around-based MOSFETs guitart. IEEE Trans. Electron Dev., 2007, 54, 572-579.
[14]
Chang, H.K.; Alejandra, C.C.; Magali, E.; Antonio, C.; Yvan, B.; Gilles, H.; Benjamin, I. A compact model for organic field-effect transistors with improved output asymptotic behaviors. IEEE Trans. Electron Dev., 2013, 60, 3.

Rights & Permissions Print Cite
Article Metrics
15
1
© 2024 Bentham Science Publishers | Privacy Policy