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International Journal of Sensors, Wireless Communications and Control

Editor-in-Chief

ISSN (Print): 2210-3279
ISSN (Online): 2210-3287

Research Article

An Efficient 4X4 Mesh Structure with a Combination of Two NoC Router Architecture

Author(s): Vivek Tiwari*, Kavita Khare and Smita Shandilya

Volume 11, Issue 2, 2021

Published on: 06 March, 2020

Page: [169 - 180] Pages: 12

DOI: 10.2174/2210327910666200306132045

Price: $65

Abstract

Background: Systems-on-chips (SoCs) used by smart phones processor manufacturing companies such as Intel, Microsoft, Texas Samsung, etc, is an essential part of any mobile device. “Network-on-Chip” is used to integrate huge numbers of Intellectual Property (IP) blocks on a single Integrated Chip (IC). Different network topologies may be used in an NoC network, but mesh topology is widely used. In a conventional mesh structure, a defined router is implemented at every node in the structure. After analyzing various parameters such as delay, power, area of conventional mesh topology, we learned that it can be refined further. In this paper, a new 4x4 mesh topology structure is proposed, in which a combination of two different NoC router architecture is implemented in a single 4x4 mesh structure.

Methods: Proposed 4x4 mesh structure consists of one conventional router and a new proposed router which is designed in such a way that it can only transfer its input data into two output channel. To achieve this component of the router such as Crossbar switch, buffer units of each channel are changed. This new proposed router Architecture model is simulated in Xilinx ISE 9.2i with targeted device Virtex4.

Results & Conclusion: Based on comparative analysis with the conventional router, there is a significant 17.24 % reduction in the area of proposed 4X4 mesh structure as compared to conventional 4X4 Mesh architecture. Further, the same analysis was also performed for 8x8, 16x16, and 32x32 mesh structures.

Keywords: Network-on-chip, system-on-chip, Mux, crossbar switch, Xilinx, Look Up Table (LUT), RTL simulation.

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