Background: Power reduction is a serious design concern for submicron logic circuits, which can be achieved by scaling the supply voltage. Modern Field Effect Transistor (FET) circuits require at least 60 mV of gate voltage for better current drive at room temperature. The tunnel Field Effect Transistor (TFET) is a leading future device due to its steep Subthreshold Swing (SS), which makes its ideal device at low power supply. Steep switching TFET can extend the supply voltage scaling with improved energy efficiency for both digital and analog applications. These devices suffer from large ambipolar current, which cannot be reduced using Dual Metal Gate (DMG) alone. Gate dielectric materials play a key role in suppressing the ambipolar current.
Objective: This paper presents a new structure known as Triple-Gate-Dielectric (DM_TGD) TFET, which combines the dielectric and work function engineering to solve these problems.
Methods: Because high dielectric material alone as gate oxide increases the fringing fields, which results in higher gate capacitance. The proposed structure uses DMG with three dielectric gate materials titanium oxide (TiO2), aluminum oxide (Al2O3) and silicon dioxide (SiO2). This structure has been simulated using 2-D ATLAS simulator in terms of drive current (Ion), ambipolar current (Iamb) and transconductance (gm).
Results: The device offers better gm, lower SS, lower leakage and larger drive currents due to weaker insulating barriers at the tunneling junction. Furthermore, higher effective dielectric constant gives better gate coupling and lower trap density.
Conclusion: The proposed structure suppresses the ambipolar current and enhances the drive current with reduced SCEs.