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Micro and Nanosystems

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ISSN (Print): 1876-4029
ISSN (Online): 1876-4037

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Research Article

A Micro-Channel Cooling Model for a Three-Dimensional Integrated Circuit Considering Through-Silicon Vias

Author(s): Kang-Jia Wang, Hong-Chang Sun* and Kui-Zhi Wang

Volume 13, Issue 1, 2021

Published on: 23 January, 2020

Page: [49 - 54] Pages: 6

DOI: 10.2174/1876402912666200123154001

Abstract

Background: With the increase in the integration degree of the three-dimensional Integrated Circuit ( 3D I C) , the thermal power consumption per unit volume increases greatly, which makes the chip temperature rise. High temperature could affect the performance of the devices and even lead to thermal failure. So, the thermal management for 3D ICs is becoming a major concern.

Objective: The aim of the research is to establish a micro-channel cooling model for a threedimensional Integrated Circuit (3D IC) considering the through-silicon vias (TSVs).

Methods: By studying the structure of the TSVs, the equivalent t hermal resistance of each layer was formulated. Then the one-dimensional micro-channel cooling thermal analytical model considering the TSVs was proposed and solved by the existing sparse solvers such as KLU.

Results: The results obtained in this paper reveal that the TSVs can effectively improve the heat dissipation, and its maximal temperature reduction is about 10.75%. The theoretical analysis is helpful to optimize the micro-channel cooling system for 3D ICs.

Conclusion: The TSV has an important influence on the heat dissipation of 3D IC, which can improve its heat dissipation characteristic.

Keywords: Through-silicon vias, thermal, three-dimensional integrated circuit, micro-channel, KLU, sparse solvers.

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[1]
Wang, K.J.; Sun, H.C.; Li, C.L. Thermal management of the hotspots in 3-d integrated circuits. Therm. Sci., 2018, 22(4), 1685-1690.
[http://dx.doi.org/10.2298/TSCI1804685W]
[2]
Dickey, M.D. Stretchable and soft electronics using liquid metals. Adv. Mater., 2017, 29(27)1606425
[http://dx.doi.org/10.1002/adma.201606425 ]
[3]
Wang, K.J. An analytical model for steady-state and transient temperature fields in 3-d integrated circuits, ieee trans. Compon. Packag. Manuf. Technol, 2016, 6(7), 1028-1041.
[4]
Moore, A.L.; Shi, L. Emerging challenges and materials for thermal management of electronics. Mater. Today, 2014, 17(4), 163-174.
[http://dx.doi.org/10.1016/j.mattod.2014.04.003]
[5]
Wang, K.J. Integrated Microchannel Cooling in A three dimensional integrated circuit: a thermal management. Therm. Sci., 2016, 20(3), 899-902.
[http://dx.doi.org/10.2298/TSCI1603899W]
[6]
Elahi, H.; Eugeni, M.; Gaudenzi, P. Piezoelectric thermo electromechanical energy harvester for reconnaissance satellite structure. Microsyst. Technol., 2019, 25(2), 665-672.
[http://dx.doi.org/10.1007/s00542-018-3994-z]
[7]
Dong, P.; Liu, X.; Chandrasekhar, S. Monolithic silicon photonic integrated circuits for compact 100{+}Gb/s coherent optical receivers and transmitters. IEEE J. Sel. Top. Quantum Electron., 2014, 20(4), 150-157.
[http://dx.doi.org/10.1109/JSTQE.2013.2295181]
[8]
Wang, K.L.; Wang, K.J. A modification of the reduced differential transform method for fractional calculus. Therm. Sci., 2018, 22(4), 1871-1875.
[http://dx.doi.org/10.2298/TSCI1804871W]
[9]
Wang, K.L.; Wang, K.J.; He, C.H. Physical insight of local fractional calculus and its application to fractional KdV-Burgers-Kuramoto equation. Fractals, 2019, 27(07)1950122
[http://dx.doi.org/10.1142/S0218348X19501226]
[10]
Tavakkoli, F.; Ebrahimi, S.; Wang, S. Analysis of critical thermal issues in 3D integrated circuits. Int. J. Heat Mass Transf., 2016, 97, 337-352.
[http://dx.doi.org/10.1016/j.ijheatmasstransfer.2016.02.010]
[11]
Choobineh, L. An explicit analytical model for rapid computation of temperature field in a three-dimensional integrated circuit (3D IC). Int. J. Therm. Sci., 2015, 87, 103-109.
[http://dx.doi.org/10.1016/j.ijthermalsci.2014.08.012]
[12]
Yu, W.J. Fast 3-D thermal simulation for integrated circuits with domain decomposition method. IEEE Trans. Comput. Aided Des. Integrated Circ. Syst., 2013, 32(12), 2014-2018.
[http://dx.doi.org/10.1109/TCAD.2013.2273987]
[13]
Coskun, A.; Meng, J.; Atienza, D. Attaining single-chip, high-performance computing through 3d systems with active cooling. IEEE Micro, 2011, 31(4), 63-75.
[http://dx.doi.org/10.1109/MM.2011.39]
[14]
Durrani, A.Y. Power and thermal modeling approach for homogeneously stacked butterfly fat tree architecture in 3D ICs. International Journal of Numerical Modelling: Electronic Networks. Devices and Fields, 2018, 31(5)e2330
[15]
Bar-Cohen, A. Thermal management of on-chip hot spots and 3D chip stacks. 2009 IEEE Inter. Conf. Microwaves, Comm., Antennas and Elect. Sys., 2009, pp. 1-8..
[http://dx.doi.org/10.1109/COMCAS.2009.5385939]
[16]
Xia, G.D.; Ma, D.D.; Wang, W. Effects of different structures and allocations on fluid flow and heat transfer performance in 3D-IC integrated micro-channel interlayer cooling. Int. J. Heat Mass Transf., 2015, 91, 1167-1175.
[http://dx.doi.org/10.1016/j.ijheatmasstransfer.2015.08.054]
[17]
Maggioni, F.L.T.; Oprins, H.; Beyne, E. Fast convolution based thermal model for 3D-ICs: Methodology, accuracy analysis and package impact. Microelectronics J., 2014, 45(12), 1746-1752.
[http://dx.doi.org/10.1016/j.mejo.2014.04.044]
[18]
Cao, K.; Zhou, J.; Wei, T. A survey of optimization techniques for thermal-aware 3D processors. J. Systems Archit., 2019, 97, 397-415.
[http://dx.doi.org/10.1016/j.sysarc.2019.01.003]
[19]
Wang, S.; Yin, Y.; Hu, C.; Rezai, P. 3D integrated circuit cooling with microfluidics. Micromachines (Basel), 2018, 9(6), 287.
[http://dx.doi.org/10.3390/mi9060287 ]
[20]
Kim, D.H.; Athikulwongse, K.; Lim, S.K. Study of through-silicon-via impact on the 3-D stacked IC layout, IEEE transactions on very large scale integration (VLSI). Systems, 2012, 21(5), 862-874.
[21]
Alqahtani, A.; Ren, Z.; Lee, J. System-level analysis of 3D ICs with thermal TSVs. ACM J. Emerg. Technol. Comput. Syst., 2018, 14(3), 37.
[http://dx.doi.org/10.1145/3264736]
[22]
Jain, A. Analytical and numerical modeling of the thermal performance of three-dimensional integrated circuits. IEEE Trans. Compon. Packag. Tech., 2010, 33(1), 56-63.
[http://dx.doi.org/10.1109/TCAPT.2009.2020916]
[23]
Hosseini, S.R.; Sheikholeslami, M.; Ghasemian, M. Nanofluid heat transfer analysis in a microchannel heat sink (MCHS) under the effect of magnetic field by means of KKL model. Powder Technol., 2018, 324, 36-47.
[http://dx.doi.org/10.1016/j.powtec.2017.10.043]
[24]
Bahiraei, M.; Heshmatian, S. Application of a novel biological nanofluid in a liquid block heat sink for cooling of an electronic processor: thermal performance and irreversibility considerations. Energy Convers. Manage., 2017, 149, 155-167.
[http://dx.doi.org/10.1016/j.enconman.2017.07.020]
[25]
Li, Y.S.; Yu, H.; Jin, H. Dynamic thermal management for 3-d ics with time-dependent power map using microchannel cooling and machine learning. IEEE Trans. Compon. Packaging Manuf. Technol., 2019, 9(7), 1244-1252.
[http://dx.doi.org/10.1109/TCPMT.2019.2920974]
[26]
Xie, J.; Swaminathan, M. Electrical-thermal co-simulation of 3D integrated systems with micro-fluidic cooling and joule heating effects. IEEE Trans. Compon. Packaging Manuf. Technol., 2011, 1, 234-246.
[http://dx.doi.org/10.1109/TCPMT.2010.2101770]
[27]
Shi, B.; Srivastava, A.; Bar-Cohen, A. Co-design of micro-fluidic heat sink and thermal through-silicon-vias for cooling of three-dimensional integrated circuit. IET Circuits Dev. Syst., 2013, 7(5), 223-231.
[http://dx.doi.org/10.1049/iet-cds.2013.0026]
[28]
Zając, P.; Napieralski, A. Novel thermal model of microchannel cooling system designed for fast simulation of liquid-cooled ICs. Microelectron. Reliab., 2018, 87, 245-258.
[http://dx.doi.org/10.1016/j.microrel.2018.06.020]
[29]
Sridhar, A.; Vincenzi, A.; Ruggiero, M. 3D-ICE: Fast compact transient thermal modeling for 3D ICs with inter-tier liquid cooling 2010 IEEE/ACM International Conference on Computer- Aided Design (ICCAD), 2010, pp. 463-470..
[http://dx.doi.org/10.1109/ICCAD.2010.5653749]
[30]
Sridhar, A.; Vincenzi, A.; Atienza, D. 3D-ICE: A compact thermal model for early-stage design of liquid-cooled ICs. IEEE Trans. Comput., 2013, 63(10), 2576-2589.
[http://dx.doi.org/10.1109/TC.2013.127]
[31]
Wang, K.J.; Sun, H.C.; Pan, Z.L. An analytical thermal model for Three-Dimensional integrated Circuits with integrated micro-channel cooling. Therm. Sci., 2017, 21(4), 1601-1606.
[http://dx.doi.org/10.2298/TSCI160716041W]
[32]
Zhu, Z.M. An analytical thermal model for 3D integrated circuit considering through silicon via. Wuli Xuebao, 2011, 60(11), 2509-2515.
[33]
Cengel, Y.A. Heat and Mass Transfer: a Practical Approach; McGraw Hill: New York, 2007.

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