Abstract
Background: The hardware implementation of neural networks has been the focus of the researchers during the last few years. The main aim is to obtain all the features possessed by the biological neural networks not possible through software approach. In the past few years, several attempts have been made for the hardware implementation of neural networks but most of them have been designed using off-the-shelf components working at high voltages. Besides, the reported topologies are not integrable on the IC along with the other systems.
Methods: The paper presents a low-voltage sinh-domain implementation of neural networks using nonmonotonic Liao’s activation function. The employment of the activation function has an added advantage that the non-linearly separable logic function such as XOR and XNOR can also be implemented using single layer perceptron which otherwise is not possible with hard limit, Sigmoidal and tanh activation functions. Besides, unlike the conventional digital VLSI design, the same neural network can be trained for different logic function by employing different weights and biases, which has been demonstrated in the paper.
Results: To verify the functionality of the designed neural networks, back propagation algorithm in MATLAB environment was used to train them for various digital logic functions. Before applying the calculated weights, these were normalized by DC bias current of the circuits. The performance of the circuits has been verified through HSPICE simulation software using 0.35μm CMOS process file.
Conclusion: A low-voltage, integrable implementation of the neural network using sinh-domain technique has been presented. The non-monotonic activation function was employed which made it possible to design XOR and XNOR functions using only single layer perceptron. The demonstration of obtaining different logic functions from the same neural network was also presented in the paper. The results obtained clearly verify the proper functioning of the proposed implementations.
Keywords: Activation functions, artificial neural networks, digital logic functions, hardware implementation of neural networks, sinh-domain companding technique.
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