Background: A theoretical model has been previously proposed to optimize the structure of
the electrical probe memory system, whereby the optimal thickness and resistivity of DLC capping
layer and TiN under layer are predicted to be 2 nm, 0.01 Ωm, and 40 nm, 2×10-7 Ωm,respectively
However, there is no experimental evidence to show that such a media stack can be fabricated in reality
by the time of writing and few patents regarding this intriguing topic have been reviewed and cited.
Methods: In order to realize this optimized design experimentally, the thickness dependent resistivity
for both DLC and TiN film are assessed, from which it is not possible to obtain a media stack with
exactly the same properties as the optimized design. Therefore, the previously proposed architecture is
re-optimized using the measured properties values, and the capability of using the modified memory
architecture to provide ultra-high density, high data rate, and low energy consumption is demonstrated.
Results: The results show that it is difficult to experimentally attain an electrical probe memory with
exactly the same properties values as the optimized counterpart.
Conclusions: An optimized electrical probe memory structure that includes a DLC capping layer and
TiN under layer was previously proposed according to a parametric approach, while the practicality of
realizing such a media stack experimentally has not bee investigated. In order to assess its practical feasibility,
we first measured the electrical resistivities of DLC and TiN films for different thicknesses. In
this case, for the purpose of optimizing the memory system with appropriate, but more physically realistic
properties values, we re-designed the architecture using the measured properties, and the modified
system is able to provide ultra-high density, large data rate, and low energy consumption.